Logic design of switching circuits : (Record no. 6887)
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000 -LEADER | |
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fixed length control field | 01509nam a22002297a 4500 |
003 - CONTROL NUMBER IDENTIFIER | |
control field | NUBALIWAG |
005 - DATE AND TIME OF LATEST TRANSACTION | |
control field | 20250117082353.0 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
fixed length control field | 250117b ph ||||| |||| 00| 0 eng d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
International Standard Book Number | 9788523135071 |
040 ## - CATALOGING SOURCE | |
Transcribing agency | NUBLRC |
050 ## - LIBRARY OF CONGRESS CALL NUMBER | |
Classification number | TK 7868.L6 .L64 2021 c.1 |
245 ## - TITLE STATEMENT | |
Title | Logic design of switching circuits : |
Remainder of title | combinational and sequential circuits. |
250 ## - EDITION STATEMENT | |
Edition statement | Second English Edition. |
260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
Place of publication, distribution, etc. | [Place of publication not identified] : |
Name of publisher, distributor, etc. | Kindle Direct Publishing, |
Date of publication, distribution, etc. | 2021. |
300 ## - PHYSICAL DESCRIPTION | |
Extent | 734 pages : |
Other physical details | illustrations ; |
Dimensions | 23 cm. |
365 ## - TRADE PRICE | |
Price amount | USD 42.00 |
490 ## - SERIES STATEMENT | |
Volume/sequential designation | Volume 1 |
-- | Volume 2 |
505 ## - FORMATTED CONTENTS NOTE | |
Formatted contents note | Chapter 1. Definitions .-Chapter 2. Boolean algebra.--definition and theorems.--Chapter 3. Functions, mappings, standards form.--Chapter 4. Logical circuits using relays.--Chapter 5. Karnaugh maps.--Chapter 6. Quiet McCluskey algorithm.--Chapter 7. Quine McCluskey algorithm for multiple simultaneous output function.--Chapter 8. NAND and NOR circuits.--Chapter 9. Function decomposition.--Chapter 10. Iterative network.--Chapter 11. Transient and hazards in switching circuits.--Chapter 12. Threshold gates.--Chapter 13. Flip flop and commands.--Chapter 14. Analysis of asynchronous sequential circuits general model-asynchronous sequential circuits.--Chapter 15. Synthesis of asynchronous sequential circuits.--Chapter 16. Analysis of sequential synchronous circuits.--Chapter 17. Structure of digital circuits. |
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical term or geographic name entry element | LOGIC CIRCUITS. |
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical term or geographic name entry element | LOGIC DESIGNS. |
942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
Source of classification or shelving scheme | Library of Congress Classification |
Koha item type | Books |
Suppress in OPAC | No |
Withdrawn status | Lost status | Source of classification or shelving scheme | Damaged status | Not for loan | Collection | Home library | Current library | Shelving location | Date acquired | Source of acquisition | Cost, normal purchase price | Total checkouts | Full call number | Barcode | Date last seen | Copy number | Price effective from | Koha item type |
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Library of Congress Classification | Computer Engineering | NU BALIWAG | NU BALIWAG | General Circulation | 01/17/2025 | Purchased- Amazon | 42.00 | GC TK 7868.L6 .L64 2021 c.1 | NUBUL000005216 | 01/17/2025 | c.1 | 01/17/2025 | Books |